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| author |   Anson Huang <Anson.Huang@nxp.com> | 2018-08-31 15:53:15 +0800 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2018-10-17 11:15:44 -0700 |
| commit | aac7ff2048a881975fceb41ae6545730dee310d2 (patch) | |
| tree | c79043e1f4575b792d210bbb51ea11e107aa5cd2 /tools/perf/scripts/python/sched-migration.py | |
| parent | clk: imx6sx: add mmdc1 ipg clock (diff) | |
| download | wireguard-linux-aac7ff2048a881975fceb41ae6545730dee310d2.tar.xz wireguard-linux-aac7ff2048a881975fceb41ae6545730dee310d2.zip | |
clk: imx6sll: add mmdc1 ipg clock
i.MX6SLL has MMDC1 ipg clock in CCM CCGR, add it into
clock tree for clock management.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/sched-migration.py')
0 files changed, 0 insertions, 0 deletions