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| author |   Paul Kocialkowski <paulk@sys-base.io> | 2025-07-01 22:11:22 +0200 |
|---|---|---|
| committer |   Chen-Yu Tsai <wens@csie.org> | 2025-07-03 23:31:05 +0800 |
| commit | 2b73328629396d32e41ca1f023653b07abf2b42f (patch) | |
| tree | d13535807d9764de765531ad46e03593b26935ec /tools/perf/scripts/python/sctop.py | |
| parent | clk: sunxi-ng: v3s: Fix CSI SCLK clock name (diff) | |
| download | wireguard-linux-2b73328629396d32e41ca1f023653b07abf2b42f.tar.xz wireguard-linux-2b73328629396d32e41ca1f023653b07abf2b42f.zip | |
clk: sunxi-ng: v3s: Fix CSI1 MCLK clock name
The CSI1 MCLK clock is reported as "csi-mclk" while it is specific to
CSI1 as the name of the definition indicates. Fix it in the driver.
Fixes: d0f11d14b0bc ("clk: sunxi-ng: add support for V3s CCU")
Signed-off-by: Paul Kocialkowski <paulk@sys-base.io>
Reviewed-By: Icenowy Zheng <uwu@icenowy.me>
Link: https://patch.msgid.link/20250701201124.812882-4-paulk@sys-base.io
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'tools/perf/scripts/python/sctop.py')
0 files changed, 0 insertions, 0 deletions