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| author |   Alistair Francis <Alistair.Francis@wdc.com> | 2019-01-12 00:41:26 +0000 |
|---|---|---|
| committer |   Palmer Dabbelt <palmer@sifive.com> | 2019-01-23 14:07:46 -0800 |
| commit | e4cf9e47ab244977d12513bb4610a44f88ad5e68 (patch) | |
| tree | 2c2a8833adf6e2f2ed7b124e743d0bccf1c0fb2a /tools/perf/scripts/python/sctop.py | |
| parent | RISC-V: defconfig: Move CONFIG_PCI{,E_XILINX} (diff) | |
| download | wireguard-linux-e4cf9e47ab244977d12513bb4610a44f88ad5e68.tar.xz wireguard-linux-e4cf9e47ab244977d12513bb4610a44f88ad5e68.zip | |
RISC-V: defconfig: Enable Generic PCIE by default
Enable generic PCIe by default in the RISC-V defconfig, this allows us
to use QEMU's PCIe support out of the box. CONFIG_RAS=y is
automatically selected by generic PCIe, so it has been dropped from
the defconfig.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
[Palmer: Split out PCIE_XILINX and CRYPTO_DEV_VIRTIO]
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'tools/perf/scripts/python/sctop.py')
0 files changed, 0 insertions, 0 deletions