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| author |   Abel Vesa <abel.vesa@linaro.org> | 2025-12-24 13:10:46 +0200 |
|---|---|---|
| committer |   Vinod Koul <vkoul@kernel.org> | 2026-01-01 16:33:58 +0530 |
| commit | 212cdedcac11c411d0e7c277e1cdcac5f1a20ba2 (patch) | |
| tree | 9887ba79157eb62ac7fa41166672d882a7440ca5 /tools/perf/scripts/python/stackcollapse.py | |
| parent | phy: qcom: edp: Fix the DP_PHY_AUX_CFG registers count (diff) | |
phy: qcom-qmp: qserdes-com: Add v8 DP-specific qserdes register offsets
Starting with Glymur, the PCIe and DP PHYs qserdes register offsets differ
for the same version number. So in order to be able to differentiate
between them, add these ones with DP prefix.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://patch.msgid.link/20251224-phy-qcom-edp-add-glymur-support-v6-3-4fcba75a6fa9@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions