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| author |   Heiko Stuebner <heiko.stuebner@theobroma-systems.com> | 2021-02-05 12:05:02 +0100 |
|---|---|---|
| committer |   Heiko Stuebner <heiko@sntech.de> | 2021-02-06 01:05:04 +0100 |
| commit | 4bc23b3c83c9a3fc0a7dd8f2f11f451aa92c85cd (patch) | |
| tree | 8043451d775da3a75a1196e2804e7efbcef70c82 /tools/perf/scripts/python/stackcollapse.py | |
| parent | clk: rockchip: use clock id for SCLK_VIP_OUT on rk3368 (diff) | |
| download | wireguard-linux-4bc23b3c83c9a3fc0a7dd8f2f11f451aa92c85cd.tar.xz wireguard-linux-4bc23b3c83c9a3fc0a7dd8f2f11f451aa92c85cd.zip | |
clk: rockchip: fix DPHY gate locations on rk3368
Fix the register and bits of the DPHY gate locations.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Link: https://lore.kernel.org/r/20210205110502.1850669-5-heiko@sntech.de
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions