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authorConor Dooley <conor.dooley@microchip.com>2023-07-20 17:21:36 +0100
committerConor Dooley <conor.dooley@microchip.com>2023-07-20 17:21:36 +0100
commit66bd0770f3d53e0a99fafccc54054339b097e808 (patch)
treecf5a0840d58b1011dd258d221c37fd1c11db3afe /tools/perf/scripts/python/stackcollapse.py
parentriscv: dts: Enable device-tree overlay support for starfive devices (diff)
parentdt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator (diff)
downloadwireguard-linux-66bd0770f3d53e0a99fafccc54054339b097e808.tar.xz
wireguard-linux-66bd0770f3d53e0a99fafccc54054339b097e808.zip
Merge tag 'clk-starfive-bindings' into riscv-dt-for-next
This is the dt-binding base for the new starfive clock stuff, that has been merged into the clk tree by Stephen. Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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