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| author |   Jonathan Marek <jonathan@marek.ca> | 2020-11-23 09:37:05 -0500 |
|---|---|---|
| committer |   Bjorn Andersson <bjorn.andersson@linaro.org> | 2021-04-08 10:23:25 -0500 |
| commit | 7178d4cc0702bfe6a7e0f21e37d6e3dfe8e40f11 (patch) | |
| tree | 26cd16753a7d2a32b30a7a34bd19ec635ba72801 /tools/perf/scripts/python/stackcollapse.py | |
| parent | arm64: dts: qcom: msm8916: Add GICv2 hypervisor registers/interrupt (diff) | |
| download | wireguard-linux-7178d4cc0702bfe6a7e0f21e37d6e3dfe8e40f11.tar.xz wireguard-linux-7178d4cc0702bfe6a7e0f21e37d6e3dfe8e40f11.zip | |
arm64: dts: qcom: update usb qmp phy clock-cells property
The top-level node doesn't provide any clocks, the subnode provides a
single clock with of_clk_hw_simple_get.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20201123143705.14277-1-jonathan@marek.ca
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions