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| author |   Biju Das <biju.das.jz@bp.renesas.com> | 2025-11-29 16:43:09 +0000 |
|---|---|---|
| committer |   Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2025-12-17 15:07:07 +0100 |
| commit | 83c405ec3a340a334c46bb59b07e5799f6d205a4 (patch) | |
| tree | f2126e79ac8932696f1433bcccb0edb6cf18c8fe /tools/perf/scripts/python/stackcollapse.py | |
| parent | serial: sh-sci: Add RSCI_PORT_SCIF32 port ID (diff) | |
serial: sh-sci: Add support for RZ/G3E RSCI clks
RZ/G3E RSCI has 6 clocks (5 module clocks + 1 external clock). Add
support for the module clocks.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://patch.msgid.link/20251129164325.209213-14-biju.das.jz@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions