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| author |   Taimur Hassan <Syed.Hassan@amd.com> | 2023-03-14 17:39:03 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2023-03-31 11:18:54 -0400 |
| commit | 8ef23f9268fc4364fc79bd017c2ed6a6495133ec (patch) | |
| tree | 4b6679b2909a5012f654122461b2df8eda8bce8e /tools/perf/scripts/python/stackcollapse.py | |
| parent | drm/amd/display: w/a for dcn315 inconsistent smu clock table (diff) | |
| download | wireguard-linux-8ef23f9268fc4364fc79bd017c2ed6a6495133ec.tar.xz wireguard-linux-8ef23f9268fc4364fc79bd017c2ed6a6495133ec.zip | |
drm/amd/display: Add 90Mhz to video_optimized_pixel_rates
[Why & How]
Needed to get certain EDID to light up during TMDS compliance.
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions