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| author |   Bjorn Helgaas <bhelgaas@google.com> | 2023-02-22 13:47:31 -0600 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2023-02-22 13:47:31 -0600 |
| commit | 90fb1a36528b5a52583c49483ca597beeb7f5435 (patch) | |
| tree | a22bf760d5faccedfcc1839f3da66d51e3c2826e /tools/perf/scripts/python/stackcollapse.py | |
| parent | Merge branch 'pci/controller/uniphier' (diff) | |
| parent | PCI: vmd: Add quirk to configure PCIe ASPM and LTR (diff) | |
| download | wireguard-linux-90fb1a36528b5a52583c49483ca597beeb7f5435.tar.xz wireguard-linux-90fb1a36528b5a52583c49483ca597beeb7f5435.zip | |
Merge branch 'pci/controller/vmd'
- Add pci_enable_link_state() to allow drivers to enable ASPM link state
(Michael Bottini)
- Add quirk to enable all ASPM link states and program LTR for devices
below VMD (David E. Box)
* pci/controller/vmd:
PCI: vmd: Add quirk to configure PCIe ASPM and LTR
PCI: vmd: Create feature grouping for client products
PCI: vmd: Use PCI_VDEVICE in device list
PCI/ASPM: Add pci_enable_link_state()
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions