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| author |   Adrian Ng Ho Yin <adrianhoyin.ng@altera.com> | 2025-10-15 10:12:43 +0800 |
|---|---|---|
| committer |   Dinh Nguyen <dinguyen@kernel.org> | 2025-11-04 15:25:44 -0600 |
| commit | aef9703dcbf8a816af06a30e51a0f9e3773086e3 (patch) | |
| tree | 06236bde8cf085f6b0fde4a7b7574b43d7373c71 /tools/perf/scripts/python/stackcollapse.py | |
| parent | arm64: dts: socfpga: agilex5: Add L2 and L3 cache (diff) | |
arm64: dts: socfpga: agilex5: Add SMMU-V3-PMCG nodes
Add SMMU-V3 Performance Monitoring Counter Group (PMCG) nodes for
Agilex5 to support SMMU performance event monitoring.
Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions