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| author |   Dan Williams <dan.j.williams@intel.com> | 2026-01-30 16:03:57 -0800 |
|---|---|---|
| committer |   Dave Jiang <dave.jiang@intel.com> | 2026-02-02 08:41:29 -0700 |
| commit | afa2bdba1ee28e21f30fe5391b0273b58b32e0d3 (patch) | |
| tree | a6ef12235c5e7d79362dd8f3a2a8ffa153797be8 /tools/perf/scripts/python/stackcollapse.py | |
| parent | cxl/port: Reduce number of @dport variables in cxl_port_add_dport() (diff) | |
cxl/port: Cleanup dport removal with a devres group
In preparation for adding more setup actions like RAS register mapping,
introduce a devres group to collect all the dport creation / registration
actions. This replaces the maintenance tedium of open coding several
devm_release_action() calls in del_dport().
Tested-by: Terry Bowman <terry.bowman@amd.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Link: https://patch.msgid.link/20260131000403.2135324-4-dan.j.williams@intel.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions