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| author |   Alvin Lee <Alvin.Lee2@amd.com> | 2022-09-13 11:06:31 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2022-09-27 17:55:11 -0400 |
| commit | b6d1c39bc637fe4879d610e6687b1d4224c4b2fb (patch) | |
| tree | f81d4669f2f654feeedb4e242679a4e85b60aa3c /tools/perf/scripts/python/stackcollapse.py | |
| parent | drm/amd/display: Avoid avoid unnecessary pixel rate divider programming (diff) | |
| download | wireguard-linux-b6d1c39bc637fe4879d610e6687b1d4224c4b2fb.tar.xz wireguard-linux-b6d1c39bc637fe4879d610e6687b1d4224c4b2fb.zip | |
drm/amd/display: Update DCN32 to use new SR latencies
[Description]
Update to new SR latencies for DCN32
Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Jasdeep Dhillon <jdhillon@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions