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| author |   Claudiu Beznea <claudiu.beznea@microchip.com> | 2020-12-16 14:57:33 +0200 |
|---|---|---|
| committer |   Sebastian Reichel <sebastian.reichel@collabora.com> | 2021-01-16 14:41:48 +0100 |
| commit | b7e15bd0c17a37d6ab61dceb08ef683855e85635 (patch) | |
| tree | 1a5c6ded37dbd17dc651ad5bf05ea2845ccde790 /tools/perf/scripts/python/stackcollapse.py | |
| parent | dt-bindings: atmel-sysreg: add microchip,sama7g5-shdwc (diff) | |
| download | wireguard-linux-b7e15bd0c17a37d6ab61dceb08ef683855e85635.tar.xz wireguard-linux-b7e15bd0c17a37d6ab61dceb08ef683855e85635.zip | |
power: reset: at91-sama5d2_shdwc: add support for sama7g5
Add support for SAMA7G5 by adding proper struct reg_config structure
and since SAMA7G5 is not currently on LPDDR setups the commit also
avoid the mapping of DDR controller.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions