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| author |   Bjorn Helgaas <bhelgaas@google.com> | 2026-04-13 12:50:47 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2026-04-13 12:50:47 -0500 |
| commit | bc55afb8fae10fc81a9c83c80b5d83ba74f5051a (patch) | |
| tree | c2b5e8a15e15bdf4101bcef137528a42fba36d48 /tools/perf/scripts/python/stackcollapse.py | |
| parent | Merge branch 'pci/controller/dwc-rcar-gen4-ep' (diff) | |
| parent | PCI: dw-rockchip: Add pcie_ltssm_state_transition tracepoint support (diff) | |
Merge branch 'pci/controller/dwc-rockchip'
- Add tracepoints for PCIe controller LTSSM transitions and link rate
changes (Shawn Lin)
- Trace LTSSM events collected by the dw-rockchip debug FIFO (Shawn Lin)
* pci/controller/dwc-rockchip:
PCI: dw-rockchip: Add pcie_ltssm_state_transition tracepoint support
Documentation: tracing: Add PCI controller event documentation
PCI: trace: Add PCI controller tracepoint feature
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions