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author | 2023-03-23 10:30:05 -0700 | |
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committer | 2023-04-07 10:54:08 -0700 | |
commit | d84f8f2687bdc67f20262e822b206419bcfd0038 (patch) | |
tree | 06e1e3836631325d63ac34269bf688a61fa80a4a /tools/perf/scripts/python/stackcollapse.py | |
parent | Merge branch 'ib-qcom-quad-spi' of https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl into arm64-for-6.4 (diff) | |
download | wireguard-linux-d84f8f2687bdc67f20262e822b206419bcfd0038.tar.xz wireguard-linux-d84f8f2687bdc67f20262e822b206419bcfd0038.zip |
arm64: dts: sc7180: Rename qspi data12 as data23
There are 4 qspi data pins: data0, data1, data2, and data3. Currently
we have a shared pin state for data0 and data1 (2 lane config) and a
pin state for data2 and data3 (you'd enable both this and the 2 lane
state for 4 lanes). The second state is obviously misnamed. Fix it.
Fixes: ba3fc6496366 ("arm64: dts: sc7180: Add qupv3_0 and qupv3_1")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230323102605.1.Ifc1b5be04653f4ab119698a5944bfecded2080d6@changeid
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions