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| author |   Siddharth Vadapalli <s-vadapalli@ti.com> | 2023-03-15 13:29:48 +0530 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2023-03-17 08:01:34 +0000 |
| commit | e0c9c2a7dd738120c2fbc155c6fba1066f109be0 (patch) | |
| tree | d9e4399b5325a0508bc0f6249fafa80fcd78dd9f /tools/perf/scripts/python/stackcollapse.py | |
| parent | dt-bindings: net: ti: k3-am654-cpsw-nuss: Fix compatible order (diff) | |
| download | wireguard-linux-e0c9c2a7dd738120c2fbc155c6fba1066f109be0.tar.xz wireguard-linux-e0c9c2a7dd738120c2fbc155c6fba1066f109be0.zip | |
dt-bindings: net: ti: k3-am654-cpsw-nuss: Add J784S4 CPSW9G support
Update bindings for TI K3 J784S4 SoC which contains 9 ports (8 external
ports) CPSW9G module and add compatible for it.
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions