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| author |   Pawel Chmielewski <pawel.chmielewski@intel.com> | 2026-01-14 13:32:55 +0100 |
|---|---|---|
| committer |   Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2026-01-15 18:17:49 +0100 |
| commit | f259664b8853981035d5fc5297e785c99f159618 (patch) | |
| tree | 56972bf67ce5f7e6152dc881c079d4ef41bfff75 /tools/perf/scripts/python/stackcollapse.py | |
| parent | ACPICA: actbl3.h: ACPI 6.6: SRAT: New flag in Memory Affinity Structure (diff) | |
ACPICA: ACPI 6.6: Add _VDM (Voltage Domain) object
A processor voltage domain is an identifier that specifies the voltage
plane associated with a given group of processors.
Refer to section 6.2.10. _VDM (Voltage Domain) of ACPI 6.6 specification
for more information.
Link: https://github.com/acpica/acpica/commit/d0dbb157646d
Signed-off-by: Pawel Chmielewski <pawel.chmielewski@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Link: https://patch.msgid.link/1921526.atdPhlSkOF@rafael.j.wysocki
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions