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| author |   Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2021-01-05 17:39:25 +0200 |
|---|---|---|
| committer |   Lee Jones <lee.jones@linaro.org> | 2021-02-08 13:54:16 +0000 |
| commit | f7b6732178e79ffb388aa343a7d0f63429d06204 (patch) | |
| tree | bc7e6b500b9b8ac1cfa98dae328e9497a2a98a27 /tools/perf/scripts/python/stackcollapse.py | |
| parent | mfd: gateworks-gsc: Fix interrupt type (diff) | |
| download | wireguard-linux-f7b6732178e79ffb388aa343a7d0f63429d06204.tar.xz wireguard-linux-f7b6732178e79ffb388aa343a7d0f63429d06204.zip | |
mfd: intel-lpss: Add Intel Alder Lake PCH-P PCI IDs
Add Intel Alder Lake LPSS PCI IDs.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions