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| author |   Tomasz Nowicki <tn@semihalf.com> | 2016-11-24 12:05:23 +0100 |
|---|---|---|
| committer |   Bjorn Helgaas <helgaas@kernel.org> | 2016-12-06 13:45:48 -0600 |
| commit | 093d24a204425f71f4f106b7e62c8df4b456e1cc (patch) | |
| tree | 09a6d3ace3e4d781d9d217bdb0085cfefbe1453b /tools/perf/scripts/python/syscall-counts.py | |
| parent | arm64: PCI: Search ACPI namespace to ensure ECAM space is reserved (diff) | |
| download | wireguard-linux-093d24a204425f71f4f106b7e62c8df4b456e1cc.tar.xz wireguard-linux-093d24a204425f71f4f106b7e62c8df4b456e1cc.zip | |
arm64: PCI: Manage controller-specific data on per-controller basis
Currently we use one shared global acpi_pci_root_ops structure to keep
controller-specific ops. We pass its pointer to acpi_pci_root_create() and
associate it with a host bridge instance for good. Such a design implies
serious drawback. Any potential manipulation on the single system-wide
acpi_pci_root_ops leads to kernel crash. The structure content is not
really changing even across multiple host bridges creation; thus it was not
an issue so far.
In preparation for adding ECAM quirks mechanism (where controller-specific
PCI ops may be different for each host bridge) allocate new
acpi_pci_root_ops and fill in with data for each bridge. Now it is safe to
have different controller-specific info. As a consequence free
acpi_pci_root_ops when host bridge is released.
No functional changes in this patch.
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions