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| author | 2011-02-11 01:48:42 +0100 | |
|---|---|---|
| committer | 2011-02-21 15:17:51 -0500 | |
| commit | 0bf719dfdecc5552155cbec78e49fa06e531e35c (patch) | |
| tree | 03e24faaf508afcea36d4b277a4dae4d7811188c /tools/perf/scripts/python/syscall-counts.py | |
| parent | fix cfg80211_wext_siwfreq lock ordering... (diff) | |
| download | wireguard-linux-0bf719dfdecc5552155cbec78e49fa06e531e35c.tar.xz wireguard-linux-0bf719dfdecc5552155cbec78e49fa06e531e35c.zip | |
p54pci: update receive dma buffers before and after processing
Documentation/DMA-API-HOWTO.txt states:
"DMA transfers need to be synced properly in order for
the cpu and device to see the most uptodate and correct
copy of the DMA buffer."
Cc: <stable@kernel.org>
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions
