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| author |   Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-10-31 15:57:02 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-11-02 08:54:59 +0200 |
| commit | 38530a37de499bbb6244018d8d515995fbd89441 (patch) | |
| tree | 351668698758e4861ef31cd17598cda9a3aa6de7 /tools/perf/scripts/python/syscall-counts.py | |
| parent | drm/i915/selftests: Run MI_BB perf selftests on SNB (diff) | |
| download | wireguard-linux-38530a37de499bbb6244018d8d515995fbd89441.tar.xz wireguard-linux-38530a37de499bbb6244018d8d515995fbd89441.zip | |
drm/i915/selftests: Test RING_TIMESTAMP on gen4/5
Now that we actually know the cs timestamp frequency on gen4/5
let's run the corresponding test.
On g4x/ilk we must read the udw of the 64bit timestamp
register. Details in {g4x,gen5)_read_clock_frequency().
The one extra caveat is that on i965 (or at least CL, don't
recall if I ever tested on BW) we must read the register
twice to get an up to date value. For some unknown reason
the first read tends to return a stale value.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221031135703.14670-6-ville.syrjala@linux.intel.com
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions