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| author |   Vasily Khoruzhick <anarsoul@gmail.com> | 2014-05-20 23:23:01 +0300 |
|---|---|---|
| committer |   Vinod Koul <vinod.koul@intel.com> | 2014-06-01 22:22:50 +0530 |
| commit | 6915f45fb9748ff578025e95506b6aec3734b886 (patch) | |
| tree | 42eaa39a5d81653a0de5daa4be7605eecf014dd6 /tools/perf/scripts/python/syscall-counts.py | |
| parent | dmaengine: imx: correct sdmac->status for cyclic dma tx (diff) | |
| download | wireguard-linux-6915f45fb9748ff578025e95506b6aec3734b886.tar.xz wireguard-linux-6915f45fb9748ff578025e95506b6aec3734b886.zip | |
dmaengine: s3c24xx-dma: Process whole SG chain
Due to redundant 'break' in loop driver processed only first chunk.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions