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| author |   Russell King - ARM Linux <linux@arm.linux.org.uk> | 2011-01-03 22:40:53 +0000 |
|---|---|---|
| committer |   Dan Williams <dan.j.williams@intel.com> | 2011-01-04 19:16:13 -0800 |
| commit | c7da9a56d608145cc763bcfc9329b92c4244d8d9 (patch) | |
| tree | 2e85075b24b15bc3e252f0295099ad8649c77ade /tools/perf/scripts/python/syscall-counts.py | |
| parent | ARM: PL08x: move cctl increment and protection setup to prep_slave_sg (diff) | |
| download | wireguard-linux-c7da9a56d608145cc763bcfc9329b92c4244d8d9.tar.xz wireguard-linux-c7da9a56d608145cc763bcfc9329b92c4244d8d9.zip | |
ARM: PL08x: move AHB master port selection into prep_* functions
As we initialize the default cctl value in the prep_* functions along
with the increment settings, we don't need to repeat the selection of
the AHB ports each time we create a LLI entry. Do this in the prep_*
functions once per transfer.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions