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| author |   Atish Patra <atish.patra@wdc.com> | 2021-03-03 12:02:50 -0800 |
|---|---|---|
| committer |   Palmer Dabbelt <palmerdabbelt@google.com> | 2021-04-26 08:31:30 -0700 |
| commit | d53b0244c84c4e2721bede258e6a229ef56a138e (patch) | |
| tree | 8f79867e697fb6b8cf0a7bad99a3af4caddb1b2e /tools/perf/scripts/python/syscall-counts.py | |
| parent | RISC-V: Add Microchip PolarFire SoC kconfig option (diff) | |
| download | wireguard-linux-d53b0244c84c4e2721bede258e6a229ef56a138e.tar.xz wireguard-linux-d53b0244c84c4e2721bede258e6a229ef56a138e.zip | |
dt-bindings: riscv: microchip: Add YAML documentation for the PolarFire SoC
Add YAML DT binding documentation for the Microchip PolarFire SoC.
It is documented at:
https://www.microsemi.com/products/fpga-soc/polarfire-soc-icicle-quick-start-guide
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions