diff options
| author |   Dmitry Osipenko <digetx@gmail.com> | 2021-03-31 02:04:43 +0300 |
|---|---|---|
| committer |   Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | 2021-04-01 19:58:22 +0200 |
| commit | d8d5cbc619e86b8f2167ae40d029a9d07e97b303 (patch) | |
| tree | ec393de056279b2a7dbbd7f1dfcc45eeb4153caf /tools/perf/scripts/python/syscall-counts.py | |
| parent | dt-bindings: memory: tegra124: emc: Replace core regulator with power domain (diff) | |
| download | wireguard-linux-d8d5cbc619e86b8f2167ae40d029a9d07e97b303.tar.xz wireguard-linux-d8d5cbc619e86b8f2167ae40d029a9d07e97b303.zip | |
dt-bindings: memory: tegra20: mc: Convert to schema
Convert Tegra20 Memory Controller binding to schema.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210330230445.26619-5-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions