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| author |   Tom Chung <chiahsuan.chung@amd.com> | 2024-12-05 23:08:28 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2025-01-06 14:44:27 -0500 |
| commit | f765e7ce0417f8dc38479b4b495047c397c16902 (patch) | |
| tree | ed9677fa258fab226bfe8d760f505681c37381f8 /tools/perf/scripts/python/syscall-counts.py | |
| parent | drm/amd/display: Add HBlank reduction DPCD write to DPMS sequence (diff) | |
| download | wireguard-linux-f765e7ce0417f8dc38479b4b495047c397c16902.tar.xz wireguard-linux-f765e7ce0417f8dc38479b4b495047c397c16902.zip | |
drm/amd/display: Fix PSR-SU not support but still call the amdgpu_dm_psr_enable
[Why]
The enum DC_PSR_VERSION_SU_1 of psr_version is 1 and
DC_PSR_VERSION_UNSUPPORTED is 0xFFFFFFFF.
The original code may has chance trigger the amdgpu_dm_psr_enable()
while psr version is set to DC_PSR_VERSION_UNSUPPORTED.
[How]
Modify the condition to psr->psr_version == DC_PSR_VERSION_SU_1
Reviewed-by: Sun peng Li <sunpeng.li@amd.com>
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions