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| author |   Ethan Bitnun <etbitnun@amd.com> | 2024-01-26 11:24:52 -0500 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2024-02-07 12:26:23 -0500 |
| commit | 461bf81a10163601ae271aecc680aa2c6a9f6bcb (patch) | |
| tree | 398acc253662ca85db61ee10c8702654faff145c /tools/perf/scripts/python/task-analyzer.py | |
| parent | drm/amd/display: Fix MST Null Ptr for RV (diff) | |
| download | wireguard-linux-461bf81a10163601ae271aecc680aa2c6a9f6bcb.tar.xz wireguard-linux-461bf81a10163601ae271aecc680aa2c6a9f6bcb.zip | |
drm/amd/display: Add delay before logging clks from hw
Add a small delay before reading clks from hw, to ensure correct values
are used for logging.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Ethan Bitnun <etbitnun@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions