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author | 2024-08-19 13:01:13 -0400 | |
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committer | 2024-09-04 17:36:21 +0800 | |
commit | 6daeee3e422ac4c978cad7a526b1aa664dab0e4a (patch) | |
tree | a37bd9748e5d6dad78ceacc2a127b2ba61b6621a /tools/perf/scripts/python/task-analyzer.py | |
parent | arm64: dts: fsl-ls1043a: move "fsl,ls1043a-qdma" ahead "fsl,ls1021a-qdma" (diff) | |
download | wireguard-linux-6daeee3e422ac4c978cad7a526b1aa664dab0e4a.tar.xz wireguard-linux-6daeee3e422ac4c978cad7a526b1aa664dab0e4a.zip |
arm64: dts: fsl-ls1012a-frdm: move clock-sc16is7xx under root node
Move fixed clock "clock-sc16is7x" from dspi to root node to fix below
warning:
arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dtb:
serial@0: Unevaluated properties are not allowed ('clock-sc16is7xx' was unexpected)
Acked-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions