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| author |   Chen Wang <unicorn_wang@outlook.com> | 2023-10-04 23:38:39 +0800 |
|---|---|---|
| committer |   Conor Dooley <conor.dooley@microchip.com> | 2023-10-06 14:36:53 +0100 |
| commit | d0366abc9de5ba41225a71d37036206149319223 (patch) | |
| tree | 15f02c9ee2b3a56724a833a729fcec89de087fec /tools/perf/scripts/python/task-analyzer.py | |
| parent | riscv: dts: starfive: add assigned-clock* to limit frquency (diff) | |
| download | wireguard-linux-d0366abc9de5ba41225a71d37036206149319223.tar.xz wireguard-linux-d0366abc9de5ba41225a71d37036206149319223.zip | |
riscv: Add SOPHGO SOC family Kconfig support
The first SoC in the SOPHGO series is SG2042, which contains 64 RISC-V
cores.
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Chao Wei <chao.wei@sophgo.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions