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| author |   Simon Horman <horms+renesas@verge.net.au> | 2016-11-23 20:51:44 +0100 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2016-11-23 20:51:44 +0100 |
| commit | 028289536c6e46fbaa949124a934e7445ccbcf64 (patch) | |
| tree | b7be27a7eadfc0b3c3496359deb001eb52ae7fab /tools/perf/scripts/python | |
| parent | ARM: dts: r8a7794: remove Z clock (diff) | |
| parent | clk: renesas: Add r8a7745 CPG Core Clock Definitions (diff) | |
| parent | ARM: shmobile: r8a7743: add power domain index macros (diff) | |
| parent | ARM: shmobile: r8a7745: add power domain index macros (diff) | |
| download | wireguard-linux-028289536c6e46fbaa949124a934e7445ccbcf64.tar.xz wireguard-linux-028289536c6e46fbaa949124a934e7445ccbcf64.zip | |
Merge tag 'rzg-clock-defs-tag1'; commit '538321bd9718'; commit '97ca8402997c' into dt-for-v4.10
Renesas RZ/G1M and RZ/G1E CPG Core Clock Definitions
Shared by clock drivers, and DTS files.