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| author |   Qiuxu Zhuo <qiuxu.zhuo@intel.com> | 2025-07-04 23:16:09 +0800 |
|---|---|---|
| committer |   Tony Luck <tony.luck@intel.com> | 2025-07-07 10:53:47 -0700 |
| commit | 05a61c6cb631a13465f9d3cc875b65a21d40568a (patch) | |
| tree | 1e2ca4eb7625578aed2bc057ecb72f3d870af108 /tools/perf/scripts/python | |
| parent | EDAC/igen6: Add Intel Wildcat Lake SoCs support (diff) | |
| download | wireguard-linux-05a61c6cb631a13465f9d3cc875b65a21d40568a.tar.xz wireguard-linux-05a61c6cb631a13465f9d3cc875b65a21d40568a.zip | |
EDAC/ie31200: Add Intel Raptor Lake-HX SoCs support
Intel Raptor Lake-HX SoC shares the same memory controller registers
as Raptor Lake-S SoC. Add a compute die ID for Raptor Lake-HX SoCs with
Out-of-Band ECC capability for EDAC support.
Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Tested-by: Laurens SEGHERS <laurens@rale.com>
Link: https://lore.kernel.org/r/20250704151609.7833-4-qiuxu.zhuo@intel.com
Diffstat (limited to 'tools/perf/scripts/python')
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