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| author |   Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2024-08-28 13:41:32 +0100 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2024-09-02 11:23:57 +0200 |
| commit | 095105496e7dde554aa3dc01189779759d976c2d (patch) | |
| tree | e585de838214acfd6c99e063587a0b967c79e167 /tools/perf/scripts/python | |
| parent | arm64: dts: renesas: r9a09g057: Add SDHI0-SDHI2 nodes (diff) | |
| download | wireguard-linux-095105496e7dde554aa3dc01189779759d976c2d.tar.xz wireguard-linux-095105496e7dde554aa3dc01189779759d976c2d.zip | |
arm64: dts: renesas: r9a09g057: Add WDT0-WDT3 nodes
Add WDT0-WDT3 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-8-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions