diff options
| author |   Shengjiu Wang <shengjiu.wang@nxp.com> | 2025-08-07 10:03:18 +0800 |
|---|---|---|
| committer |   Mark Brown <broonie@kernel.org> | 2025-08-10 21:06:41 +0100 |
| commit | 0e270f32975fd21874185ba53653630dd40bf560 (patch) | |
| tree | d9d026d0286624e13368760b524086f3973e565d /tools/perf/scripts/python | |
| parent | Linux 6.17-rc1 (diff) | |
| download | wireguard-linux-0e270f32975fd21874185ba53653630dd40bf560.tar.xz wireguard-linux-0e270f32975fd21874185ba53653630dd40bf560.zip | |
ASoC: fsl_sai: replace regmap_write with regmap_update_bits
Use the regmap_write() for software reset in fsl_sai_config_disable would
cause the FSL_SAI_CSR_BCE bit to be cleared. Refer to
commit 197c53c8ecb34 ("ASoC: fsl_sai: Don't disable bitclock for i.MX8MP")
FSL_SAI_CSR_BCE should not be cleared. So need to use regmap_update_bits()
instead of regmap_write() for these bit operations.
Fixes: dc78f7e59169d ("ASoC: fsl_sai: Force a software reset when starting in consumer mode")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Link: https://patch.msgid.link/20250807020318.2143219-1-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions