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| author |   Conor Dooley <conor.dooley@microchip.com> | 2022-09-27 12:19:14 +0100 |
|---|---|---|
| committer | Conor Dooley <conor.dooley@microchip.com> | 2022-09-27 18:53:58 +0100 |
| commit | 0ebdc51787dbb8ef8d259daa98b8fd35babf8970 (patch) | |
| tree | d5cb33686d44f8a28bc06cfae64f89a8cbd58785 /tools/perf/scripts/python | |
| parent | dt-bindings: riscv: microchip: document icicle reference design (diff) | |
| download | wireguard-linux-0ebdc51787dbb8ef8d259daa98b8fd35babf8970.tar.xz wireguard-linux-0ebdc51787dbb8ef8d259daa98b8fd35babf8970.zip | |
dt-bindings: riscv: microchip: document the aries m100pfsevp
Add a compatible for the Aries Embedded M100PFSEVP SOM + EVK platform.
Link: https://www.aries-embedded.com/polarfire-soc-fpga-microsemi-m100pfs-som-mpfs025t-pcie-serdes
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions