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| author |   Faraz Ata <faraz.ata@samsung.com> | 2025-06-13 11:52:08 +0530 |
|---|---|---|
| committer |   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2025-06-18 11:43:59 +0200 |
| commit | 134442a04bb9a6981923cbb24f041b5f5690bda6 (patch) | |
| tree | c3e861bd4bf39dc19224cec29b5c4bbea62002f7 /tools/perf/scripts/python | |
| parent | arm64: dts: exynosautov920: add CMU_HSI2 clock DT nodes (diff) | |
| download | wireguard-linux-134442a04bb9a6981923cbb24f041b5f5690bda6.tar.xz wireguard-linux-134442a04bb9a6981923cbb24f041b5f5690bda6.zip | |
arm64: dts: exynosautov920: Add DT node for all SPI ports
Universal Serial Interface (USI) supports three serial protocol
like uart, i2c and spi. ExynosAutov920 has 18 instances of USI.
Add spi nodes for all the instances.
Signed-off-by: Faraz Ata <faraz.ata@samsung.com>
Link: https://lore.kernel.org/r/20250613062208.978641-1-faraz.ata@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions