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| author |   Frank Li <Frank.Li@nxp.com> | 2025-06-06 12:24:09 -0400 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2025-07-24 14:26:01 -0700 |
| commit | 17a6d7ceceeaf1e9696de689fea6d8a13ab68f99 (patch) | |
| tree | 65de54d847ffd3eafe3ab5e641f6574f86444c78 /tools/perf/scripts/python | |
| parent | dt-bindings: clock: Convert qca,ath79-pll to DT schema (diff) | |
| download | wireguard-linux-17a6d7ceceeaf1e9696de689fea6d8a13ab68f99.tar.xz wireguard-linux-17a6d7ceceeaf1e9696de689fea6d8a13ab68f99.zip | |
dt-bindings: clock: convert lpc1850-cgu.txt to yaml format
Convert lpc1850-cgu.txt to yaml format.
Additional changes:
- remove extra clock source nodes in example.
- remove clock consumer in example.
- remove clock-output-names and clock-clock-indices from required list to
match existed dts.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Link: https://lore.kernel.org/r/20250606162410.1361169-1-Frank.Li@nxp.com
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions