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| author |   Krzysztof Kozlowski <krzk@kernel.org> | 2020-12-10 22:28:59 +0100 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzk@kernel.org> | 2020-12-29 16:44:47 +0100 |
| commit | 1ac8893c4fa3d4a34915dc5cdab568a39db5086c (patch) | |
| tree | 73fe3ae00cfe54c9fbbd1bfb60919f0e14f829f1 /tools/perf/scripts/python | |
| parent | ARM: dts: exynos: correct PMIC interrupt trigger level on Spring (diff) | |
| download | wireguard-linux-1ac8893c4fa3d4a34915dc5cdab568a39db5086c.tar.xz wireguard-linux-1ac8893c4fa3d4a34915dc5cdab568a39db5086c.zip | |
ARM: dts: exynos: correct PMIC interrupt trigger level on Arndale Octa
The Samsung PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU. The falling edge
interrupt will mostly work but it's not correct.
Fixes: 1fed2252713e ("ARM: dts: fix pinctrl for s2mps11-irq on exynos5420-arndale-octa")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20201210212903.216728-5-krzk@kernel.org
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions