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| author |   Tiezhu Yang <yangtiezhu@loongson.cn> | 2020-11-03 15:12:04 +0800 |
|---|---|---|
| committer |   Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-11-11 23:53:13 +0100 |
| commit | 381ad3843b26ec9b461e7973729ef64b36ed4627 (patch) | |
| tree | 9adc11a4903710b321516e37d721834a77509625 /tools/perf/scripts/python | |
| parent | MIPS: Loongson64: Add Mail_Send support for 3A4000+ CPU (diff) | |
| download | wireguard-linux-381ad3843b26ec9b461e7973729ef64b36ed4627.tar.xz wireguard-linux-381ad3843b26ec9b461e7973729ef64b36ed4627.zip | |
MIPS: Loongson64: SMP: Fix up play_dead jump indicator
In play_dead function, the whole 64-bit PC mailbox was used as a indicator
to determine if the master core had written boot jump information.
However, after we introduced CSR mailsend, the hardware will not guarante
an atomic write for the 64-bit PC mailbox. Thus we have to use the lower
32-bit which is written at the last as the jump indicator instead.
Signed-off-by: Lu Zeng <zenglu@loongson.cn>
Signed-off-by: Jun Yi <yijun@loongson.cn>
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions