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author | 2025-08-11 07:41:44 +0200 | |
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committer | 2025-08-12 11:31:24 -0500 | |
commit | 3f69f2e78799bf76e5dfe74f2eda4d67812d4edc (patch) | |
tree | 6076610e33e9aa90cd9cafa4c31c46ad4d184a5c /tools/perf/scripts/python | |
parent | Linux 6.17-rc1 (diff) | |
download | wireguard-linux-3f69f2e78799bf76e5dfe74f2eda4d67812d4edc.tar.xz wireguard-linux-3f69f2e78799bf76e5dfe74f2eda4d67812d4edc.zip |
PCI: xilinx: Fix NULL pointer dereference in xilinx_pcie_intr_handler()
f29861aa301c5 ("PCI: xilinx: Switch to msi_create_parent_irq_domain()")
changed xilinx_pcie::msi_domain from child devices' interrupt domain to
Xilinx AXI bridge's interrupt domain.
However, xilinx_pcie_intr_handler() wasn't changed and still reads Xilinx
AXI bridge's interrupt domain from xilinx_pcie::msi_domain->parent. This
pointer is NULL now.
Update xilinx_pcie_intr_handler() to read the correct interrupt domain
pointer.
Fixes: f29861aa301c5 ("PCI: xilinx: Switch to msi_create_parent_irq_domain()")
Signed-off-by: Nam Cao <namcao@linutronix.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patch.msgid.link/20250811054144.4049448-1-namcao@linutronix.de
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions