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| author |   Marc Zyngier <maz@kernel.org> | 2025-06-26 16:49:00 +0200 |
|---|---|---|
| committer |   Thomas Gleixner <tglx@linutronix.de> | 2025-07-03 15:49:24 +0200 |
| commit | 59422904dd9855f94d00dc66598bef1bd2663894 (patch) | |
| tree | 593734653d32ec7931375c5a344f9f9a8001b19b /tools/perf/scripts/python | |
| parent | irqchip/bcm2712-mip: Switch to msi_create_parent_irq_domain() (diff) | |
| download | wireguard-linux-59422904dd9855f94d00dc66598bef1bd2663894.tar.xz wireguard-linux-59422904dd9855f94d00dc66598bef1bd2663894.zip | |
irqchip/riscv-imsic: Convert to msi_create_parent_irq_domain() helper
Now that we have a concise helper to create an MSI parent domain,
switch the RISC-V letter soup over to that.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Nam Cao <tglx@linutronix.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/all/b906a38d443577de45923b335d80fc54c5638da0.1750860131.git.namcao@linutronix.de
Link: https://lore.kernel.org/all/20241204124549.607054-6-maz@kernel.org
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions