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| author |   Palmer Dabbelt <palmer@dabbelt.com> | 2025-06-12 11:59:05 -0700 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@dabbelt.com> | 2025-06-12 12:14:06 -0700 |
| commit | 5c5ecd1f3413cce5474a16255f4212680d3ca5d5 (patch) | |
| tree | e46eb587ce236c62f72a35510c7f56a33b9c8e87 /tools/perf/scripts/python | |
| parent | riscv: fix runtime constant support for nommu kernels (diff) | |
| parent | RISC-V: vDSO: Correct inline assembly constraints in the getrandom syscall wrapper (diff) | |
| download | wireguard-linux-5c5ecd1f3413cce5474a16255f4212680d3ca5d5.tar.xz wireguard-linux-5c5ecd1f3413cce5474a16255f4212680d3ca5d5.zip | |
Merge tag 'riscv-fixes-6.16-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/alexghiti/linux into fixes
riscv fixes for 6.16-rc1
- A fix for the newly introduced getrandom vdso where clang optimizes
away a register variable which is both an input and an output
parameter
- A fix for theadvector where we did not save all the vector registers,
only a few of them
* tag 'riscv-fixes-6.16-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/alexghiti/linux:
RISC-V: vDSO: Correct inline assembly constraints in the getrandom syscall wrapper
riscv: vector: Fix context save/restore with xtheadvector
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions