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| author |   Hawking Zhang <Hawking.Zhang@amd.com> | 2023-03-06 15:48:48 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2023-03-15 18:45:27 -0400 |
| commit | 65ba96e91b689c23d6fa99c11cfd65965dcddc47 (patch) | |
| tree | 1803e2129534eb1ec2aa1e404d744e20fa3906a4 /tools/perf/scripts/python | |
| parent | drm/amdgpu: drop ras check at asic level for new blocks (diff) | |
| download | wireguard-linux-65ba96e91b689c23d6fa99c11cfd65965dcddc47.tar.xz wireguard-linux-65ba96e91b689c23d6fa99c11cfd65965dcddc47.zip | |
drm/amdgpu: Move to common indirect reg access helper
Replace soc15, nv, soc21 specific callbacks with common
one. so we don't need to duplicate code when introduce
new asics.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions