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| author |   Zong-Zhe Yang <kevin_yang@realtek.com> | 2021-03-19 13:42:14 +0800 |
|---|---|---|
| committer |   Kalle Valo <kvalo@codeaurora.org> | 2021-04-11 12:24:33 +0300 |
| commit | 76325506e8111ed013ff9d1f9e86bf015bda234d (patch) | |
| tree | ff2298525e777ae2b627f591da91e6bc558b50d3 /tools/perf/scripts/python | |
| parent | rtw88: add flush hci support (diff) | |
| download | wireguard-linux-76325506e8111ed013ff9d1f9e86bf015bda234d.tar.xz wireguard-linux-76325506e8111ed013ff9d1f9e86bf015bda234d.zip | |
rtw88: fix DIG min setting
DIG min is expected to be set according to chip. And actually we assigned
it under each chip information. However, we didn't use the setting when we
did DIG process. It is unexpected, so we fix it.
Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20210319054218.3319-4-pkshih@realtek.com
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions