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authorXu Yang <xu.yang_2@nxp.com>2025-08-06 16:39:55 +0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2025-08-13 17:16:22 +0200
commit8fe06185e11ae753414aa6117f0e798aa77567ff (patch)
tree3bc81ae4c885c7875a443c15206d5144bd0c5f9f /tools/perf/scripts/python
parentusb: renesas-xhci: Fix External ROM access timeouts (diff)
downloadwireguard-linux-8fe06185e11ae753414aa6117f0e798aa77567ff.tar.xz
wireguard-linux-8fe06185e11ae753414aa6117f0e798aa77567ff.zip
usb: core: hcd: fix accessing unmapped memory in SINGLE_STEP_SET_FEATURE test
The USB core will unmap urb->transfer_dma after SETUP stage completes. Then the USB controller will access unmapped memory when it received device descriptor. If iommu is equipped, the entire test can't be completed due to the memory accessing is blocked. Fix it by calling map_urb_for_dma() again for IN stage. To reduce redundant map for urb->transfer_buffer, this will also set URB_NO_TRANSFER_DMA_MAP flag before first map_urb_for_dma() to skip dma map for urb->transfer_buffer and clear URB_NO_TRANSFER_DMA_MAP flag before second map_urb_for_dma(). Fixes: 216e0e563d81 ("usb: core: hcd: use map_urb_for_dma for single step set feature urb") Cc: stable <stable@kernel.org> Reviewed-by: Jun Li <jun.li@nxp.com> Signed-off-by: Xu Yang <xu.yang_2@nxp.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Link: https://lore.kernel.org/r/20250806083955.3325299-1-xu.yang_2@nxp.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'tools/perf/scripts/python')
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