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| author |   Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2024-12-24 12:12:15 +0200 |
|---|---|---|
| committer |   Bjorn Andersson <andersson@kernel.org> | 2025-01-06 18:05:27 -0600 |
| commit | a34d21d89c85e8bb72ecd83b7cde2cba1aa718f4 (patch) | |
| tree | 932040f011b4fca78ab9e8b598ed4ddcdbae84ff /tools/perf/scripts/python | |
| parent | dt-bindings: clock: qcom,mmcc-msm8960: add LCDC-related clocks (diff) | |
| download | wireguard-linux-a34d21d89c85e8bb72ecd83b7cde2cba1aa718f4.tar.xz wireguard-linux-a34d21d89c85e8bb72ecd83b7cde2cba1aa718f4.zip | |
clk: qcom: rcg: add 1/1 pixel clock ratio
LVDS clocks require 1:1 ration support in the table used by
clk_rcg_pixel_ops. Add corresponding divider to the table.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241224-apq8064-fix-mmcc-v1-3-c95d2e2bf143@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions