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| author |   Julien Massot <julien.massot@collabora.com> | 2025-05-16 16:12:13 +0200 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2025-06-20 18:17:23 -0700 |
| commit | a42b4dcc4f9f309a23e6de5ae57a680b9fd2ea10 (patch) | |
| tree | e693005df05974760c359b50029aab1dedcc5f42 /tools/perf/scripts/python | |
| parent | clk: imx: Fix an out-of-bounds access in dispmix_csr_clk_dev_data (diff) | |
| download | wireguard-linux-a42b4dcc4f9f309a23e6de5ae57a680b9fd2ea10.tar.xz wireguard-linux-a42b4dcc4f9f309a23e6de5ae57a680b9fd2ea10.zip | |
dt-bindings: clock: mediatek: Add #reset-cells property for MT8188
The '#reset-cells' property is permitted for some of the MT8188
clock controllers, but not listed as a valid property.
Fixes: 9a5cd59640ac ("dt-bindings: clock: mediatek: Add SMI LARBs reset for MT8188")
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Julien Massot <julien.massot@collabora.com>
Link: https://lore.kernel.org/r/20250516-dtb-check-mt8188-v2-1-fb60bef1b8e1@collabora.com
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions