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| author |   Mark Brown <broonie@kernel.org> | 2024-12-16 18:25:51 +0000 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2024-12-16 18:25:51 +0000 |
| commit | a5dfca553c237c8cfd0b02aacad64d6e6e14149b (patch) | |
| tree | 892917f78394fad45bee4f7a0660c6e2c2bb0a44 /tools/perf/scripts/python | |
| parent | firmware: cs_dsp: avoid large local variables (diff) | |
| parent | ASoC: Intel: mtl-match: Add CDB35L56-EIGHT-C 8x CS35L56 without CS42L43 (diff) | |
| download | wireguard-linux-a5dfca553c237c8cfd0b02aacad64d6e6e14149b.tar.xz wireguard-linux-a5dfca553c237c8cfd0b02aacad64d6e6e14149b.zip | |
ASoC: Intel: Add matches for Cirrus Logic CDB35L56
Merge series from Bard Liao <yung-chuan.liao@linux.intel.com>:
This series adds TGL and MTL matches for configurations using the
Cirrus Logic CDB35L56-EIGHT-C board.
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions