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| author |   Ville Syrjälä <ville.syrjala@linux.intel.com> | 2024-06-11 16:33:39 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2024-06-20 15:38:08 +0300 |
| commit | a6c8dfbfcd0137b2676f0e3c48752c3d618d9805 (patch) | |
| tree | 2f0fd02a6ef0d928ad11237a8d651cbf3b203417 /tools/perf/scripts/python | |
| parent | drm/i915: Pass the whole atomic state to intel_color_prepare_commit() (diff) | |
| download | wireguard-linux-a6c8dfbfcd0137b2676f0e3c48752c3d618d9805.tar.xz wireguard-linux-a6c8dfbfcd0137b2676f0e3c48752c3d618d9805.zip | |
drm/i915/dsb: Plumb the whole atomic state into intel_dsb_prepare()
The DSB code will need to examine both the old and new crtc
states. Pass in the whole atomic state so we can dig up
what we need.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240611133344.30673-7-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions