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| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2024-01-15 14:46:39 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2024-02-06 10:45:48 +0100 |
| commit | c1ff917c88dc5c20084467150e0c852351e3352c (patch) | |
| tree | 0608b8b7c4e621074061e8d3520701d4cdaf9ef9 /tools/perf/scripts/python | |
| parent | arm64: dts: renesas: r9a07g043u: Add CSI and CRU nodes (diff) | |
| download | wireguard-linux-c1ff917c88dc5c20084467150e0c852351e3352c.tar.xz wireguard-linux-c1ff917c88dc5c20084467150e0c852351e3352c.zip | |
ARM: dts: renesas: Improve TMU interrupt descriptions
Add the input capture interrupt on Timer Unit instances that have it.
Add "interrupt-names" properties for clarity.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/389a18ee2cea96726462c28463cf212330f74ee3.1705325654.git.geert+renesas@glider.be
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions